
                   Information for S3 Chipset Users
                   --------------------------------

Contents
--------
        1) Supported hardware
        2) 16bpp and 32bpp
        3) List of Supported Clock Chips
        4) Additional notes

1 - Supported hardware
----------------------

The current S3 Server supports all available S3 chipsets: 911, 924,
801/805, 928, 864, and 964. Nevertheless, this is not enough to
support every board using one of these chipsets. The following list
contains some data points on boards that are known to work. If your
card is similar to one of the described ones, chances are good it
might work for you, too.


        S3 801/805, AT&T 20C490 (or similar) RAMDAC 
                Orchid Farenheit 1280+ VLB
                Actix GE32

                        8 and 15/16 bpp

                        Note: the ATT20C490 RAMDAC is not automatically
                        detected by the server.  You need to provide
                        a 'Ramdac "att20c490"' entry in your XF86Config.

                        Real AT&T 20C490 or 20C491 RAMDACs work with
                        the "dac_8_bit" option.  Some clones (like
                        the Winbond 82C490) do not.


        S3 805 VLB, S3 GENDAC (RAMDAC + clock synthesizer)
                MIRO 10SD (available for VLB and PCI)
                          [it is not known whether all 10SDs use the S3 GENDAC]

                        8 and 15/16 bpp

                        ClockChip "s3gendac"
                        RamDac    "s3gendac"


        S3 805, Diamond SS2410 RAMDAC, ICD2061A Clockchip
                Diamond Stealth 24 VLB
 
                        8 bpp only
                        requires Option "nolinear"


        S3 928, AT&T 20C490 RAMDAC 
                Actix Ultra

                        8 and 15/16 bpp


        S3 928, Sierra SC15025 RAMDAC, ICD2061A Clockchip
                ELSA Winner 1000 ISA/EISA ("TwinBus", not Winner1000ISA!!)
                ELSA Winner 1000 VL

                        8, 15/16 and 24(32) bpp

                        Supports 8bit/pixel RGB in 8bpp
                        and gamma correction for 15/16 and 24bpp modes

                        24 bpp might get "snowy" if the clock is near
                        the limit of 30 MHz. This is not considered
                        dangerous, but limits the usability of 24 bpp.

                        D-step (or below) chips cannot be used with
                        a line width of 1152; hence the most effective
                        mode for a 1 MB board is about 1088x800x8
                        (similiar to 2 MB, 1088x800x16).


        S3 928, Bt9485 RAMDAC, ICD2061A Clockchip
                STB Pegasus VL 
                        
                        8 bpp only  

                        Supports RGB with sync-on-green if
                        "sync_on_green" option is provided and board
                        jumper is set for BNC outputs.

                        Option "stb_pegasus"

                        The "dac_8_bit" option is recommended.


        S3 928, Bt485 RAMDAC, SC11412 Clockchip
                SPEA Mercury 2MB VL
                        
                        8, 15/16 bpp only  

                        Option "SPEA_Mercury"
                        ClockChip "SC11412"

                        The "dac_8_bit" option is recommended.


        S3 928, Bt485 RAMDAC, ICD2061A Clockchip
                #9 GXE Level 10, 11, 12
                        
                        8 bpp only  

                        Option "number_nine"

                        The "dac_8_bit" option is recommended.


        S3 928, Ti3020 RAMDAC, ICD2061A Clockchip
                #9 GXE Level 14, 16
                        
                        8 bpp only  

                        Supports RGB with sync-on-green

                        Option "number_nine"

                        The "dac_8_bit" option is recommended.


        S3 864, ATT20c498 or STG1700 RAMDAC, ICD2061A or ICS9161 Clockchip
                Elsa Winner1000PRO VLB
                Elsa Winner1000PRO PCI

                        8, 15/16 and 24(32) bpp


        S3 864, STG1700 RAMDAC, ICD2061A Clockchip
                Actix GraphicsENGINE 64 VLB/2MB

                        8, 15/16 (and probably 24(32)) bpp


        S3 864, 20C498 RAMDAC, ICS2595 Clockchip
                SPEA MirageP64 2MB DRAM

                        8 and 15/16 bpp

                        ClockChip "ICS2595"

                        Clockchip support is only preliminary and
                        on some machines problems with the first
                        mode after startup of XF86_S3 or after 
                        switching back from VT have been seen; 
                        switching to next mode with CTRL+ALT+'+'
                        and back seems to solve this problem


        S3 964, AT&T 20C505 RAMDAC, ICD2061A Clockchip
                Miro Crystal 20SV PCI

                        8, 15/16, 24(32) bpp


        S3 964, AT&T Bt485 RAMDAC, ICD2061A Clockchip
                Diamond Stealth 64

                        8, 15/16, 24(32) bpp


        S3 964, Ti3020 RAMDAC, ICD2061A Clockchip
                Elsa Winner2000PRO PCI

                        8 bpp only


        S3 964, Ti3025 RAMDAC, Ti3025 Clockchip
                #9 GXE64 Pro VLB
                #9 GXE64 Pro PCI

                        8 bpp, 15, 16 and 24(32) bpp

                        Option "number_nine"

                        There are some known problems with the GXE64 Pro
                        support, including some image shifting/wrapping
                        at 15/16/24 bpp.

2 - 16bpp and 32bpp
-------------------

On 801/805 + ATT490 Cards (like the Farenheit 1280+ VLB) only 15
and 16bpp are supported. 32bpp isn't available on this type of
chips. (There is a 24 bit mode under MS Windows, but it's not a 32bpp
sparse mode but a real 3 bytes/pixel mode -- implementing this in
XFree86 isn't easy).

3 - List of Supported Clock Chips
---------------------------------

ICD2061A                                ==> ClockChip "icd2061a"
ICS9161 (ICD2061A compatible)           ==> ClockChip "icd2061a"
S3 86c708 GENDAC                        ==> ClockChip "s3gendac"
S3 86c716 SDAC                          ==> ClockChip "s3_sdac"
Sierra SC11412                          ==> ClockChip "sc11412"
ICS2595                                 ==> ClockChip "ics2595"
TI3025                                  ==> ClockChip "ti3025"

4 - Additional Notes
--------------------

If you have a RAMDAC that is not listed here, be VERY careful not to
overdrive it using XF86_S3. Better contact the XFree86 team first to
verify that running XF86_S3 will not damage your board.

If you feel adventerous you could also open up your computer and have
a peek at your RAMDAC. The RAMDAC is usually ome the larger chips
(second or third largest chip that is NOT an EPROM) on the board.  The
markings on it are usually

  <Company logo>

      <company identifier><part number>-<speed grade>
      <manufacturing week><manufacturing year>  
      <lot number><other funny numbers>

For example 

          @@
          @@ AT&T

        ATT20C490-11
         9339S ES
          9869874

This is a ATT 490 with a speed grade of 110 MHz. This would then mean that
you put a "DacSpeed 110" line in your XF86Config file.  Be advised that
some RAMDACs have different modes that have different limits. The
manufacturer will always mark the chip naming the higher limits, so you
should be careful.  The S3 server knows how to handle the limits for most
of the RAMDACs it supports providing the DacSpeed is specified correctly.


chips labeled "-80" or "-8"  should use DacSpeed 80 in the device section
S3716-ME SDAC  ==>  DacSpeed 110
SC15025-8      ==>  DacSpeed  80
ATT20C490-80   ==>  DacSpeed  80


Some RAMDACs (like the Ti3025) require some mode timing consideration for
their hardware cursor to work correctly.  The Ti3025 requires that the
mode have a back porch of at least 80 pixel-clock cycles.  A symptom of
this not being correct is the HW cursor being chopped off when positioned
close to the right edge of the screen.


$XFree86: xc/programs/Xserver/hw/xfree86/doc/README.S3,v 3.5 1994/09/29 14:28:14 dawes Exp $
